combinational

FAOG: An algorithm based on filter techniques and AOG for multiple error rectification in combinational logic circuits

FAOG：基于过滤技术和AOG的组合电路多故障诊断算法

Test generation and optimization of bridging faults diagnosis in combinational circuit

组合电路桥接故障诊断的测试生成及优化

Taking the effects of geometrical nonlinearity into account, a general theory of composite thin walled bar is established under the combinational deformation of tension, compression and torsion.

考虑几何非线性的影响，建立了在拉、压、弯、扭组合变形下复合材料薄壁杆件理论。

This paper discusses equivalence checking for combinational circuits and analyzes the key techniques of FAN algorithm.

摘要讨论了组合电路的等价性检验方法,分析了FAN算法的关键技术.

The digital part includes closed loop oscillator, frequency divider, combinational logic circuit, non-overlapping clock generation circuit.

数字部分包含环形振荡器、分频器、组合逻辑门、非交叠时钟产生电路。

Expansion Technique for MSI Combinational Circuits Based on Algebraic Decomposition

基于代数分解的MSI组合电路扩展技术

A Cubical Order Expansion Algorithm for Finding Irredundant Covering of Combinational Circuits

求组合电路无冗余覆盖的立方有序扩展法

Test Generation Algorithm Based on Search State Dominance for Combinational Circuits

基于搜索状态控制的组合电路测试生成算法

The test pattern generation algorithms for combinational logic circuit and the fault types were discussed.

讨论了组合逻辑电路的故障诊断的方法，故障的类型。

A special testing sequence input is need for measuring maximum dyna-mic current of a combinational logic circuit.

组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现。

The research of this paper is based on the Boolean Satisfiability ( SAT ) Problem of combinational circuit.

本文研究工作是针对可满足问题 ( SAT ) 在组合电路验证和测试中的应用展开的.

This text keeps the crack defect of tank floor plate simplification and turns into a few kinds comparatively suppleness analysis model in figure, namely the V shape section crack defect, rectangle section crack defect and combinational form section crack defect.

本文把储罐底板表面裂纹简化成形状相对简单的几种分析模型，即V形端面裂纹、矩形端面裂纹以及组合形端面裂纹。

The binomial coefficients are ubiquitous in Combinational Theory.

二项系数在组合论中有普遍的应用.

A novel description of test schedule based on transitive closure graph is proposed in this paper, and it is suitable for combinational optimization.

本文提出了基于传递闭合图（Transitive Closure Graph）的测试调度表示法，该表示法符合P-admissible准则，使组合优化算法适用于SoC测试调度问题。

The model and the output of experiments makes clear there exists combinational node in lemma stratum.

尤其是在产生大于一个词汇的短语或句子时,存在词条层关联节点的激活.

Efficient Data Structure for SAT Solvers& Combinational Test Generation

SAT数据结构与组合测试生成

Test pattern generation for combinational circuits

组合电路测试生成研究及实验

Study on Chaos Control and Chaotic Optimization with Its Applications in Test Generation for Combinational Logic Circuits

混沌控制与混沌优化及其在组合电路测试生成中的应用研究

Fault Localization For Combinational Circuits Based on Reed-Muller

基于Reed-Muller模式的组合电路故障定位方法

Study on Composite Shear Wall Structure System with Thermal Insulation Wall Form of Glazed Hollow Beads ANALYSES OF MECHANICAL BEHAVIORS OF COMBINATIONAL MULTI-RIBBED COMPOSITE WALL

玻化微珠保温墙模复合剪力墙体系研究组合式密肋复合墙体的受力性能研究

Research on Test Technology of Combinational Logic Circuits in the Control System of Magnetic Bearings

磁力轴承控制系统中组合电路测试技术研究

Research on automatic test generation of combinational circuits based on ant colony optimization

蚁群优化在组合电路测试生成中的应用

Digital Design: Binary System , Boolean Algebra, Logic Gates , Simplification of Boolean Functions , Combinational Logic.

数位设计: 二进位制 、 氏代数 、 辑闸 、 氏函数的化简、合逻辑电路.

Equivalence checking can be divided into two directions : combinational equivalence checking and sequential equivalence checking.

等价验证可以分为组合电路的等价验证和时序电路的等价验证.

We have so far studied combinational circuits.

到现在为止,我们已研究了组合电路.

Application of First Degree Boolean Difference for Test Generation of Combinational Logic Circuit

一阶布尔差分在组合逻辑电路测试生成中的应用

A full custom Multiple-function and Multiple-Valued Array Integrated Circuit ( MMAIC) is presented in this paper, which is able to realize binary, ternary combinational logic, sequential logic and multiplexed digital and analog switching function etc.

本文提出了一种可实现二值、三值组合逻辑、时序逻辑和多路数字模拟开关等功能的全定制多功能多值逻辑阵列集成电路（简称MMAIC）。

The Expansion Technique for MSI Combinational Modules Based on Algebraic Method

基于代数方法的MSI组合部件的扩展技术

A Method of Test Generation for Large Combinational Circuits Using Input Vector in Three

用三矢量链对大规模组合电路的测试生成研究

Here, standard units include basic gate circuits, flip-flops and other basic combinational logic circuits.

在这里, 标准单元是指基本的门电路, 触发器或其他基本组合逻辑电路.